Embedded Microprocessor
Saturday, October 31, 2009
EEMBC, the Embedded Microprocessor Benchmark Consortium, is a non-profit organization formed in 1997 with the aim of developing meaningful performance benchmarks for the hardware and software used in embedded systems. The goal of its members is to make EEMBC benchmarks an industry standard for evaluating the capabilities of embedded microprocessors, compilers, and the associated embedded system implementations according to objective, clearly defined, application-based criteria.
EEMBC benchmarks aim to reflect real-world applications and the demands that embedded systems encounter in these environments. The consortium licenses "algorithms" and "applications" organized into benchmark suites targeting telecommunications, networking, digital entertainment, Java, automotive/industrial, consumer, and office equipment products, and an additional suite that allows users to observe the energy consumed by the processor when performing these algorithms and applications. EEMBC also has a series of multicore-specific benchmarks that span multiple application areas.
Only EEMBC members are entitled to publish their benchmark test results, and they must submit these to the EEMBC Technology Center (ETC) for official certification before making the scores public. The ETC also offers full benchmark testing and analysis services.
The president of EEMBC is Markus Levy, who is also president of the Multicore Association. The director of software engineering is Shay Gal-On.
Benchmarks
Automotive
* AutoBench 1.1, performance of microprocessors and microcontrollers in automotive, industrial, and general-purpose applications
Consumer
* ConsumerBench 1.1, performance of processors in digital still cameras, printers, and other embedded systems that handle digital imaging tasks
Digital Entertainment
* DENBench 1.0, performance of processor subsystems in multimedia tasks such as image, video, and audio file compression and decompression
Java
* GrinderBench 1.0, performance of Java ME applications in products such as mobile phones and PDAs
Multicore
* MultiBench 1.0 extends the EEMBC scope to analyze multicore architectures, memory bottlenecks, OS scheduling support, synchronization efficiency, and other related system functions. It measures the impact of parallelization and scalability across both data processing and computationally-intensive tasks.
Networking
* NetworkingBench 1.1, performance of processors in low-end routers
* NetworkingBench 2.0, performance of processors tasked with moving packets in networking applications
Office Automation
* OABench 1.1, performance of processors in printers, plotters, and other office automation systems that handle text and image processing tasks
Telecom
* TeleBench 1.1, performance of processors in modem, xDSL, and related fixed-telecom applications
Power/Energy
* EnergyBench, ties performance with energy consumption for specific benchmarks, specified for silicon devices which can be certified under current procedures
CoreMark
CoreMark is a free benchmark that targets the CPU core. It was developed by Shay Gal-On and released as an industry standard by EEMBC in 2009. CoreMark’s primary goals are simplicity and providing a method for testing only a processor’s core features. Each iteration of CoreMark performs the following algorithms: list processing (find and sort), matrix manipulation (common matrix operations), state machine (determine if an input stream contains valid numbers), and CRC.
References
Shay Gal-On, Markus Levy, "Measuring Multicore Performance," Computer, vol. 41, no. 11, pp. 99-102, Nov. 2008, doi:10.1109/MC.2008.464